NEWS & TECHNOLOGY COVER STORY
Introducing a new industry benchmark
MOSFET footprint
The OptiMOS™ Source-Down Power MOSFET
By Bastian Lang, Product Marketing Manager at Infineon Technologies
When it comes to power management, the market is
striving for higher energy efficiency, power density,
ruggedness and improved lifetime for end applications.
While advancements in silicon technologies are pushing
the envelope of key performance parameters, new package
concepts offering groundbreaking benefits are seldom. With
the introduction of the new Source-Down technology and the
release of a whole new product family, Infineon is leading the
way towards defining a new industry standard footprint.
Drain-Down versus Source-Down
Figure 1: the internal construction of a PQFN 3.3x3.3 mm
Drain-Down power MOSFET (left) and the internal
construction of a PQFN 3.3x3.3 mm Source-Down power
MOSFET (right)
Figure 1 (on the left) shows the structure of a modern vertical
trench power MOSFET, giving an idea of the cross-section of
a power MOSFET underneath a PQFN 3.3x3.3 mm package.
The base of this architecture is a lead frame. This is serving as
the carrier of the thin silicon die and the drain connection of the
silicon on the bottom side. In a vertical trench MOSFET, the current
is flowing vertically through the device,the top- and the bottom
side of the device therefore serve as electrical connections.
The active trenches of an n-channel power MOSFET are on the
source side of the die which is typically located at the top. The
source connection of the silicon die is established with a copper
clip that is connecting the top area of the silicon die with a part
of the lead frame. The gate connection is also located on the
side of the active trenches and typically connected with the lead
frame via a bond wire. With this construction, all three electrical
connections can be brought onto the lead frame so that the
MOSFET can be mounted on a PCB.
The Source-Down concept
This new approach is simple yet groundbreaking. We take the
silicon die inside of the MOSFET package and flip it upside
down. This way now the source potential is connected to the
lead frame instead of the drain potential. Figure 1 (on the right)
shows the structure of the new Source-Down technology. The
gate and source connection of the silicon die is directly established
on the lead frame. The electrical connection of the drain
(from the top of the die) can be achieved with a very large copper
clip.
Figure 2 shows the difference in the footprints of the PQFN
3.3x3.3 mm OptiMOS™ MOSFET family. The electrical connection
of drain, source and gate are still at the same location
making a drop-in replacement very easy.
Figure 2:(a) A standard PQFN 3.3x3.3 mm, (b) the new Source-
Down PQFN 3.3x3.3 mm and (c) the new Source-Down
Center-Gate PQFN 3.3x3.3 mm package footprints
With the introduction of the new Source-Down concept, two
new footprints are established. The Source-Down Standard-
Gate (Figure 2b) and the Source-Down Center-Gate (Figure 2c).
Utilizing the Source-Down benefits
These new footprints come with several benefits such as:
1) Improved RDS(on) 2) Reduced thermal resistance
3) New thermal management capabilities
RDS(on): Flipping the die upside down removes some construction
limitations that apply to the standard drain-down devices.
With the Source-Down approach, some of these constraints are
loosened enabling the use of much bigger dies and hence reduction
of RDS(on) by 30%. Lower RDS(on) is directly linked to the
reduction of I2R losses in the application and leads to greater
power densities.
Thermal management: It is one of the strongest disciplines in
power electronics design. Keeping your thermals under control
directly translates to longer end-device lifetimes or the ability to
increase power density. The Source-Down concept offers multiple
benefits enabling cooler designs. A significant reduction in
RDS(on) has an impact on thermals too: as it lowers losses in the
device, consequently the device-temperature is decreased. The
active trenches of a vertical power MOSFET are located on the
source side of the silicon die. This is where most of the losses
are generated during the operation and ultimately where the
losses are converted to excess heat. In a traditional Drain-Down
device, this heat needs to be transported through the silicon to
the drain side which is connected to the lead frame and then to
the PCB.
Flipping the die upside down puts these active trenches of the
silicon die directly onto the copper lead frame. The heat that
is generated in those trenches can, therefore, be conducted
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